| 2024 | DAC | Late Breaking Results: On the One-Key Premise of Logic Locking. | Yinghua Hu, Hari Cherupalli, Mike Borza, Deepak D. Sherlekar |
| 2022 | DAC | A scalable symbolic simulation tool for low power embedded systems. | Subhash Sethumurugan, Shashank Hegde, Hari Cherupalli, John Sartori |
| 2021 | ASPDAC | Constrained Conservative State Symbolic Co-analysis for Ultra-low-power Embedded Systems. | Shashank Hegde, Subhash Sethumurugan, Hari Cherupalli, Henry Duwe, John Sartori |
| 2017 | ASPLOS | Determining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors. | Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori |
| 2017 | HPCA | Enabling Effective Module-Oblivious Power Gating for Embedded Processors. | Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori |
| 2017 | ICCAD | Scalable N-worst algorithms for dynamic timing and activity analysis. | Hari Cherupalli, John Sartori |
| 2017 | ISCA | Bespoke Processors for Applications with Ultra-low Area and Power Constraints. | Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori |
| 2017 | MICRO | Software-based gate-level information flow security for IoT systems. | Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori |
| 2016 | ICCAD | Automated error prediction for approximate sequential circuits. | Amrut Kapare, Hari Cherupalli, John Sartori |
| 2016 | ISCA | Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems. | Hari Cherupalli, Rakesh Kumar, John Sartori |
| 2015 | ICCAD | Graph-based Dynamic Analysis: Efficient Characterization of Dynamic Timing and Activity Distributions. | Hari Cherupalli, John Sartori |