Hari Vijay Venkatanarayanan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
1
Active years
2006–2025
Best venue rank
National
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | VLSID | TOGGLE6.0: A 4.8Gbps Next Generation Area and Power Efficient Transceiver for Flash Memory Interface. | Hari Vijay Venkatanarayanan, Rustum Prasad Sahu, Maheswara Alamuru, Ergam Reddy Battini, Syed Mohammed Haroon, Saurav Suman, Deepika Mallela, Sanjeeb Kumar Ghosh, Billy Koo |
| 2008 | VLSID | A Jitter Reduction Circuit Using Autocorrelation for Phase-Locked Loops and Serializer-Deserializer (SERDES) Circuits. | Hari Vijay Venkatanarayanan, Michael L. Bushnell |
| 2007 | VLSID | A Neural Net Branch Predictor to Reduce Power. | Rajamani Sethuram, Omar I. Khan, Hari Vijay Venkatanarayanan, Michael L. Bushnell |
| 2006 | VLSID | An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip. | Hari Vijay Venkatanarayanan, Michael L. Bushnell |