Harish Kriplani
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
3
Active years
1990–2002
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2002 | DAC | Timing model extraction of hierarchical blocks by graph reduction. | Cho W. Moon, Harish Kriplani, Krishna P. Belkhale |
| 1994 | ISCAS | Improved Delay and Current Models for Estimating Maximum Currents in CMOS VLSI Circuits. | Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj |
| 1993 | DAC | Resolving Signal Correlations for Estimating Maximum Currents in CMOS Combinational Circuits. | Harish Kriplani, Farid N. Najm, Ping Yang, Ibrahim N. Hajj |
| 1992 | DAC | Maximum Current Estimation in CMOS Circuits. | Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj |
| 1990 | IJCNN | Resource constrained design of artificial neural networks. | Benjamin W. Wah, Harish Kriplani |