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Hasan Erdem Yantir

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

5

Active years

2013–2018

Best venue rank

A

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2018DATERapid in-memory matrix multiplication using associative processor.Mohamed Ayoub Neggaz, Hasan Erdem Yantir, Smal Niar, Ahmed M. Eltawil, Fadi J. Kurdahi
2017CASESEfficient pulsed-latch implementation for multiport register files: work-in-progress.Wael M. Elsharkasy, Hasan Erdem Yantir, Amin Khajeh, Ahmed M. Eltawil, Fadi J. Kurdahi
2016ICCDProcess variations-aware resistive associative processor design.Hasan Erdem Yantir, Mohammed E. Fouda, Ahmed M. Eltawil, Fadi J. Kurdahi
2014FPLApplication specific multi-port memory customization in FPGAs.Gorker Alp Malazgirt, Hasan Erdem Yantir, Arda Yurdakul, Smal Niar
2013DSDEfficient Implementations of Multi-pumped Multi-port Register Files in FPGAs.Hasan Erdem Yantir, Salih Bayar, Arda Yurdakul