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Hidenori Sato

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

8

Active years

1996–2004

Best venue rank

A*

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2004ASPDACA static and dynamic energy reduction technique for I-cache and BTB in embedded processors.Hidenori Sato, Toshinori Sato
2004ECCVArm-Pointer: 3D Pointing Interface for Real-World Interaction.Eiichi Hosoya, Hidenori Sato, Miki Kitabata, Ikuo Harada, Hisao Nojima, Akira Onozawa
2003ISMARA Mirror Metaphor Interaction System: Touching Remote Real Objects in an Augmented Reality Environment.Eiichi Hosoya, Miki Kitabata, Hidenori Sato, Ikuo Harada, Hisao Nojima, Fumiharu Morisawa, Shinichiro Mutoh, Akira Onozawa
2002ICPRHexagonal Image Representation for 3-D Photorealistic Reconstruction.Hidenori Sato, Hiroto Matsuoka, Akira Onozawa, Hitoshi Kitazawa
2002ISCASNecessary and sufficient conditions for one-dimensional discrete-time binary cellular neural networks with both A- and B-templates to be stable.Tetsuo Nishi, Hidenori Sato, Norikazu Takahashi
2002SIGGRAPHRegeneration of real objects in the real world.Hiroto Matsuoka, Akira Onozawa, Hidenori Sato, Hisao Nojima
2002SIGGRAPHRegeneration of real objects in the real world.Hiroto Matsuoka, Akira Onozawa, Hidenori Sato, Hisao Nojima
2000ISCASMPEG-2 4: 2: 2@HL encoder chip set.Hidenori Sato, Hideo Ohira, Masahiko Kazayama, Ayako Harada, Masahiko Yoshimoto, Okikazu Tanno, Satoshi Kumaki, Kazuya Ishibara, Atsuo Hanami, Tetsuya Mutsumura
2000PGOptimizing Network 3D Data Transmissions for Interactive Applications.Ikuo Harada, Hidenori Sato, Hitoshi Kitazawa
1996DATEA Balanced-Mesh Clock Routing Technique Using Circuit Partitioning.Hidenori Sato, Akira Onozawa, Hiroaki Matsuda