Hiran Tennakoon
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2002–2011
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | DAC | Power reduction via separate synthesis and physical libraries. | Mohammad Rahman, Ryan Afonso, Hiran Tennakoon, Carl Sechen |
| 2011 | DATE | Power reduction via near-optimal library-based cell-size selection. | Mohammad Rahman, Hiran Tennakoon, Carl Sechen |
| 2005 | DAC | Efficient and accurate gate sizing with piecewise convex delay models. | Hiran Tennakoon, Carl Sechen |
| 2002 | ICCAD | Gate sizing using Lagrangian relaxation combined with a fast gradient-based pre-processing step. | Hiran Tennakoon, Carl Sechen |