Hiroki Koike
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
1990–2016
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | ISCAS | Stochastic behavior-considered VLSI CAD environment for MTJ/MOS-hybrid microprocessor design. | Masanori Natsui, Akira Tamakoshi, Akira Mochizuki, Hiroki Koike, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu |
| 2012 | ISCAS | High-speed simulator including accurate MTJ models for spintronics integrated circuit design. | Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Hiroaki Honjo, Tadahiko Sugibayashi, Hiroki Koike, Takashi Ohsawa, Shunsuke Fukami, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh |
| 2010 | ASPDAC | An electrically adjustable 3-terminal regulator with post-fabrication level-trimming function. | Hiroyuki Morimoto, Hiroki Koike, Kazuyuki Nakamura |
| 1990 | ITC | A BIST scheme using microprogram ROM for large capacity memories. | Hiroki Koike, Toshio Takeshima, Masahide Takada |