| 2021 | IECON | Parasitic Inductance Design for Preventing Oscillatory False Triggering of Parallel-Connected GaN-FETs. | Yusuke Hatakenaka, Kazuhiro Umetani, Masataka Ishihara, Eiji Hiraki, Hiroshi Tadano |
| 2019 | IECON | New Modulation Strategy for Volume Reduction of Inductor for q-Z-source Inverter. | Mengyu Li, Ryuji Iijima, Tomoyuki Mannen, Takanori Isobe, Hiroshi Tadano |
| 2019 | IECON | Unbalanced Load Compensation for Solid-State Transformer Using Smoothing Capacitors of Cascaded H-Bridges as Energy Buffer. | Akihiro Motoki, Takanori Isobe, Katsushi Terazono, Hiroshi Tadano |
| 2019 | IECON | Design Strategy of Z-source Inverter for Utilization of Power Semiconductors with Extremely Low Short-circuit Capability. | Kaoru Takashima, Ryuji Iijima, Tomoyuki Mannen, Takanori Isobe, Noriyuki Iwamuro, Hiroshi Tadano |
| 2015 | IECON | Investigation of eliminating free-wheeling diode conduction of Z-source inverter using SiC-MOSFET. | Ryuji Iijima, Takanori Isobe, Hiroshi Tadano |
| 2015 | IECON | Novel dead time controlled gate driver using the current sensor of SiC-MOSFET. | Akimasa Niwa, Takanori Imazawa, Tomonori Kimura, Takanari Sasaya, Takanori Isobe, Hiroshi Tadano |