Hiroyuki Kageyama
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
1999–1999
Best venue rank
B
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1999 | ASPDAC | Formal Verification Method for Combinatorial Circuits at High Level Design. | Junji Kitamichi, Hiroyuki Kageyama, Nobuo Funabiki |