Hiroyuki Yamauchi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
1980–2012
Best venue rank
B
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ASPDAC | Endurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device. | Meng-Fan Chang, Ching-Hao Chuang, Min-Ping Chen, Lai-Fu Chen, Hiroyuki Yamauchi, Pi-Feng Chiu, Shyh-Shyuan Sheu |
| 2000 | ISMIS | A Method and Language for Constructing Multiagent Systems. | Hiroyuki Yamauchi, Setsuo Ohsuga |
| 1996 | ISLPED | A 0.5V/100 MHz over-VCC grounded data storage (OVGS) SRAM cell architecture with boosted bit-line and offset source over-driving schemes. | Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira Matsuzawa |
| 1980 | COLING | Processing Of Syntax And Semantics Of Natural Language By Predicate Logic Of Predicate Logic. | Hiroyuki Yamauchi |