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Hongzhong Zheng

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

23

Venues

13

Active years

2007–2025

Best venue rank

A*

Where they publish

Papers

23 indexed papers, newest first.

YearVenueTitleAuthors
2025ICCADHD-MoE: Hybrid and Dynamic Parallelism for Mixture-of-Expert LLMs with 3D Near-Memory Processing.Haochen Huang, Shuzhang Zhong, Zhe Zhang, Shuangchen Li, Dimin Niu, Hongzhong Zheng, Runsheng Wang, Meng Li
2023ASPLOSSpada: Accelerating Sparse Matrix Multiplication with Adaptive Dataflow.Zhiyao Li, Jiaxiang Li, Taijie Chen, Dimin Niu, Hongzhong Zheng, Yuan Xie, Mingyu Gao
2023ICCADKlotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators.Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie
2023MICROArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis.Chen Bai, Jiayi Huang, Xuechao Wei, Yuzhe Ma, Sicheng Li, Hongzhong Zheng, Bei Yu, Yuan Xie
2023MICROTT-GNN: Efficient On-Chip Graph Neural Network Training via Embedding Reformation and Hardware Optimization.Zheng Qu, Dimin Niu, Shuangchen Li, Hongzhong Zheng, Yuan Xie
2022HPCAEnabling High-Quality Uncertainty Quantification in a PIM Designed for Bayesian Neural Network.Xingchen Li, Bingzhe Wu, Guangyu Sun, Zhe Zhang, Zhihang Yuan, Runsheng Wang, Ru Huang, Dimin Niu, Hongzhong Zheng, Zhichao Lu, Liang Zhao, Meng-Fan Marvin Chang, Tianchan Guan, Xin Si
2022ICPADSPredicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio.Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, Xiaolang Yan, Yuan Xie
2022ISCAHyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network.Shuangchen Li, Dimin Niu, Yuhao Wang, Wei Han, Zhe Zhang, Tianchan Guan, Yijin Guan, Heng Liu, Linyong Huang, Zhaoyang Du, Fei Xue, Yuanwei Fang, Hongzhong Zheng, Yuan Xie
2019ISCACoNDA: efficient cache coherence support for near-data accelerators.Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Rachata Ausavarungnirun, Kevin Hsieh, Nastaran Hajinazar, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu
2018MICROSCOPE: A Stochastic Computing Engine for DRAM-Based In-Situ Accelerator.Shuangchen Li, Alvin Oliver Glova, Xing Hu, Peng Gu, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie
2017MICRODRISA: a DRAM-based reconfigurable in-situ accelerator.Shuangchen Li, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie
2017SCArchitecting HBM as a high bandwidth, high capacity, self-managed last-level cache.Tyler Stocksdale, Mu-Tien Chang, Hongzhong Zheng, Frank Mueller
2016HPCCFlexDrive: A Framework to Explore NVMe Storage Solutions.Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng
2016ISCADRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric.Mingyu Gao, Christina Delimitrou, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Christos Kozyrakis
2016SYSTORSoftware-Defined Emulation Infrastructure for High Speed Storage.Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng
2015MASCOTSFAME: A Fast and Accurate Memory Emulator for New Memory System Architecture Exploration.Krishna T. Malladi, Mu-Tien Chang, John Ping, Hongzhong Zheng
2010ICPPHeterogeneous Mini-rank: Adaptive, Power-Efficient Memory Architecture.Kun Fang, Hongzhong Zheng, Zhichun Zhu
2009ISCADecoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices.Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu
2008ICPPMemory Access Scheduling Schemes for Systems with Multi-Core Processors.Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu
2008MICROMini-rank: Adaptive DRAM architecture for improving memory power efficiency.Hongzhong Zheng, Jiang Lin, Zhao Zhang, Eugene Gorbatov, Howard David, Zhichun Zhu
2008SIGMETRICSSoftware thermal management of dram memory for multicore systems.Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Eugene Gorbatov, Howard David, Zhao Zhang
2007ISCAThermal modeling and management of DRAM memory systems.Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard David, Zhao Zhang
2007ISPASSDRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving.Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang, Howard David