Hsien-Chen Chiu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2007–2011
Best venue rank
A*
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | ISCAS | A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement technique. | Yu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Yi-Chi Wu, Bing-Feng Lin, Hsien-Chen Chiu, Charlie Chung-Ping Chen |
| 2011 | ISCAS | A 12 Gb/s chip-to-chip AC coupled transceiver. | Yu-Shun Wang, Min-Han Hsieh, Yi-Chi Wu, Chia-Ming Liu, Hsien-Chen Chiu, Bing-Feng Lin, Charlie Chung-Ping Chen |
| 2007 | INFOCOM | Using a Single Switch with O(M) Inputs/Outputs for the Construction of an Optical Priority Queue with O(M | Hsien-Chen Chiu, Cheng-Shang Chang, Jay Cheng, Duan-Shin Lee |