Hui-Chi Chen
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2010–2010
Best venue rank
B
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2010 | ASPDAC | Minimizing clock latency range in robust clock tree synthesis. | Wen-Hao Liu, Yih-Lang Li, Hui-Chi Chen |