Hyeong-Ju Kang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
8
Venues
5
Active years
2000–2023
Best venue rank
A*
Where they publish
Papers
8 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | FPGA | AoCStream: All-on-Chip CNN Accelerator With Stream-Based Line-Buffer Architecture. | Hyeong-Ju Kang |
| 2003 | DAC | SAT-based unbounded symbolic model checking. | Hyeong-Ju Kang, In-Cheol Park |
| 2003 | ISCAS | Pairing and ordering to reduce hardware complexity in cascade form filter design. | Hyeong-Ju Kang, In-Cheol Park |
| 2003 | ISCAS | A 24-bit floating-point audio DSP controller supporting fast exponentiation. | Sung-Won Lee, Hyeong-Ju Kang, In-Cheol Park |
| 2002 | ICASSP | A high-speed and low-latency Reed-Solomon decoder based on a dual-line structure. | Hyeong-Ju Kang, In-Cheol Park |
| 2001 | DAC | Digital Filter Synthesis Based on Minimal Signed Digit Representation. | In-Cheol Park, Hyeong-Ju Kang |
| 2001 | ISCAS | Multiplier-less IIR filter synthesis algorithms to trade-off the delay and the number of adders. | Hyeong-Ju Kang, In-Cheol Park |
| 2000 | ICCAD | FIR Filter Synthesis Algorithms for Minimizing the Delay and the Number of Adders. | Hyeong-Ju Kang, Hansoo Kim, In-Cheol Park |