| 2024 | MICRO | ICED: An Integrated CGRA Framework Enabling DVFS-Aware Acceleration. | Cheng Tan, Miaomiao Jiang, Deepak Patil, Yanghui Ou, Zhaoying Li, Lei Ju, Tulika Mitra, Hyunchul Park, Antonino Tumeo, Jeff Zhang |
| 2014 | CGO | Just-In-Time Software Pipelining. | Hongbo Rong, Hyunchul Park, Youfeng Wu, Cheng Wang |
| 2013 | MICRO | Allocating rotating registers by scheduling. | Hongbo Rong, Hyunchul Park, Cheng Wang, Youfeng Wu |
| 2012 | ASPLOS | SIMD defragmenter: efficient ILP realization on data-parallel architectures. | Yongjun Park, Sangwon Seo, Hyunchul Park, Hyoun Kyu Cho, Scott A. Mahlke |
| 2012 | MICRO | Libra: Tailoring SIMD Execution Using Heterogeneous Hardware and Dynamic Configurability. | Yongjun Park, Jason Jong Kyu Park, Hyunchul Park, Scott A. Mahlke |
| 2012 | MICRO | SMARQ: Software-Managed Alias Register Queue for Dynamic Optimizations. | Cheng Wang, Youfeng Wu, Hongbo Rong, Hyunchul Park |
| 2011 | HCI | A Guideline for an Outpatient Guidance System for Use in General Hospitals. | Gunhee Kim, Jukyung Park, Manchul Han, Hyunchul Park, Dayoung Jung, Se Hyung Park, Seongil Lee, Sungdo Ha |
| 2010 | CASES | Resource recycling: putting idle resources to work on a composable accelerator. | Yongjun Park, Hyunchul Park, Scott A. Mahlke, Sukjin Kim |
| 2009 | CASES | CGRA express: accelerating execution using dynamic operation fusion. | Yongjun Park, Hyunchul Park, Scott A. Mahlke |
| 2009 | HCI | An OWL-Based Knowledge Model for Combined-Process-and-Location Aware Service. | Gunhee Kim, Manchul Han, Jukyung Park, Hyunchul Park, Se Hyung Park, Laehyun Kim, Sungdo Ha |
| 2009 | MICRO | Polymorphic pipeline array: a flexible multicore accelerator with virtualized execution for mobile multimedia applications. | Hyunchul Park, Yongjun Park, Scott A. Mahlke |
| 2008 | CGO | Modulo scheduling for highly customized datapaths to increase hardware reusability. | Kevin Fan, Hyunchul Park, Manjunath Kudlur, Scott A. Mahlke |
| 2006 | CASES | Modulo graph embedding: mapping applications onto coarse-grained reconfigurable architectures. | Hyunchul Park, Kevin Fan, Manjunath Kudlur, Scott A. Mahlke |
| 2005 | MICRO | Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System. | Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott A. Mahlke |
| 2004 | MICRO | Application-Specific Processing on a General-Purpose Core via Transparent Instruction Set Customization. | Nathan Clark, Manjunath Kudlur, Hyunchul Park, Scott A. Mahlke, Krisztin Flautner |