| 2020 | DATE | Energy-Efficient Two-level Instruction Cache Design for an Ultra-Low-Power Multi-core Cluster. | Jie Chen, Igor Loi, Luca Benini, Davide Rossi |
| 2018 | ISCAS | Sub-mW multi-Gbps chip-to-chip communication Links for Ultra-Low Power IoT end-nodes. | Martino Dazzi, Pierpaolo Palestri, Davide Rossi, Andrea Bandiziol, Igor Loi, David E. Bellasi, Luca Benini |
| 2016 | ISCAS | A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision. | Antonio Pullini, Francesco Conti, Davide Rossi, Igor Loi, Michael Gautschi, Luca Benini |
| 2015 | DATE | High performance AXI-4.0 based interconnect for extensible smart memory cubes. | Erfan Azarkhish, Davide Rossi, Igor Loi, Luca Benini |
| 2014 | DATE | A multi banked - Multi ported - Non blocking shared L2 cache for MPSoC platforms. | Igor Loi, Luca Benini |
| 2014 | ISCA | A Stream Buffer Mechanism for Pervasive Splitting Transformations on Polyhedral Process Networks. | Paolo Meloni, Giuseppe Tuveri, Luigi Raffo, Igor Loi, Francesco Conti |
| 2012 | DATE | A resilient architecture for low latency communication in shared-L1 processor clusters. | Mohammad Reza Kakoee, Igor Loi, Luca Benini |
| 2012 | DATE | An energy efficient DRAM subsystem for 3D integrated SoCs. | Christian Weis, Igor Loi, Luca Benini, Norbert Wehn |
| 2011 | DATE | A fully-synthesizable single-cycle interconnection network for Shared-L1 processor clusters. | Abbas Rahimi, Igor Loi, Mohammad Reza Kakoee, Luca Benini |
| 2011 | DATE | Design space exploration for 3D-stacked DRAMs. | Christian Weis, Norbert Wehn, Igor Loi, Luca Benini |
| 2010 | DATE | An efficient distributed memory interface for many-core platform with 3D stacked DRAM. | Igor Loi, Luca Benini |
| 2010 | ISCAS | 3D NoCs - Unifying inter & intra chip communication. | Igor Loi, Pol Marchal, Antonio Pullini, Luca Benini |
| 2009 | DATE | Synthesis of low-overhead configurable source routing tables for network interfaces. | Igor Loi, Federico Angiolini, Luca Benini |
| 2008 | DATE | Developing Mesochronous Synchronizers to Enable 3D NoCs. | Igor Loi, Federico Angiolini, Luca Benini |
| 2008 | ICCAD | A low-overhead fault tolerance scheme for TSV-based 3D network on chip links. | Igor Loi, Subhasish Mitra, Thomas H. Lee, Shinobu Fujita, Luca Benini |