| 2008 | ASPDAC | A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures. | Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt |
| 2007 | CASES | Software controlled memory layout reorganization for irregular array access patterns. | Doosan Cho, Ilya Issenin, Nikil D. Dutt, Jonghee W. Yoon, Yunheung Paek |
| 2006 | CASES | Mitigating soft error failures for multimedia applications by selective data protection. | Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt, Nalini Venkatasubramanian |
| 2006 | DAC | Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies. | Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil D. Dutt |
| 2005 | CASES | Compilation techniques for energy reduction in horizontally partitioned cache architectures. | Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt |
| 2005 | DATE | FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations. | Ilya Issenin, Nikil D. Dutt |
| 2004 | DATE | Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies. | Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil D. Dutt |
| 2002 | DATE | Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints. | Ana Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil D. Dutt, Alexander V. Veidenbaum, Alexandru Nicolau |