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In-Cheol Park

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

85

Venues

13

Active years

1990–2020

Best venue rank

A*

Where they publish

Papers

85 indexed papers, newest first.

YearVenueTitleAuthors
2020ISCASA Low-Latency Multi-Touch Detector Based on Concurrent Processing of Redesigned Overlap Split and Connected Component Analysis.Byeong Yong Kong, Jooseung Lee, In-Cheol Park
2020ISCASA 120-mW 0.16-ms-Latency Connectivity-Scalable Multiuser Detector for Interleave Division Multiple Access.Byeong Yong Kong, In-Cheol Park
2018ASPDACA 2.4pJ/bit, 6.37Gb/s SPC-enhanced BC-BCH decoder in 65nm CMOS for NAND flash storage systems.Jaehwan Jung, In-Cheol Park, Youngjoo Lee
2016PIMRCLow-complexity symbol detection for massive MIMO uplink based on Jacobi method.Byeong Yong Kong, In-Cheol Park
2015ICASSPNarrow-range frequency estimation based on comprehensive optimization of DFT and interpolation.Byeong Yong Kong, In-Cheol Park
2014ASPDAC7.3 Gb/s universal BCH encoder and decoder for SSD controllers.Hoyoung Yoo, Youngjoo Lee, In-Cheol Park
2013ASPDACA 3Gb/s 2.08mmYoungjoo Lee, Hoyoung Yoo, In-Cheol Park
2013VTCAdaptive Metric Calculation for Improving Detection Capability of MIMO Detectors.Byeong Yong Kong, In-Cheol Park
2013VTCMemory-Optimized Hybrid Decoding Method for Multi-Rate Turbo Codes.Injae Yoo, Bongjin Kim, In-Cheol Park
2012ICASSPSmall-area parallel syndrome calculation for strong BCH decoding.Youngjoo Lee, Hoyoung Yoo, In-Cheol Park
2012VTCSNR-Adaptive Input Quantization for Turbo Decoding.Injae Yoo, In-Cheol Park
2011ISCASQC-LDPC Decoding Architecture based on Stride Scheduling.Bongjin Kim, In-Cheol Park
2010ISCASDual-rail decoding of low-density parity-check codes.Bongjin Kim, Hasan Ahmed, In-Cheol Park
2010ISCASCapacitor array structure and switching control scheme to reduce capacitor mismatch effects for SAR analog-to-digital converters.Youngjoo Lee, In-Cheol Park
2010ISCASLow-complexity tone reservation method for PAPR reduction of OFDM systems.Kangwoo Park, In-Cheol Park
2010ISLPEDSmall-area and low-energyTae-Hwan Kim, In-Cheol Park
2009GLOBECOMImplementation of a High-Throughput and Area-Efficient MIMO Detector Based on Modified Dijkstra's Search.Tae-Hwan Kim, In-Cheol Park
2009ICCDMultiplier-less and table-less linear approximation for square and square-root.In-Cheol Park, Tae-Hwan Kim
2009ICIPArchitecture design of a high-performance dual-symbol binary arithmetic coder for JPEG2000.Minsoo Rhu, In-Cheol Park
2009ICIPMemory-less bit-plane coder architecture for JPEG2000 with concurrent column-stripe coding.Minsoo Rhu, In-Cheol Park
2009ISCASA Scalable and Programmable Sound Synthesizer.Tae-Hwan Kim, Youngjoo Lee, In-Cheol Park
2009ISCASFast Frequency Acquisition Phase Frequency Detectors with Prediction-based edge Blocking.Kangwoo Park, In-Cheol Park
2009ISCASNovel Pipelined DWT Architecture for Dual-line Scan.Jinook Song, In-Cheol Park
2008ASPDACDuo-binary circular turbo decoder based on border metric encoding for WiMAX.Ji-Hoon Kim, In-Cheol Park
2008ASPDACArea and power efficient design of coarse time synchronizer and frequency offset estimator for fixed WiMAX systems.Tae-Hwan Kim, In-Cheol Park
2008ICCDDigital filter synthesis considering multiple adder graphs for a coefficient.Jeong-Ho Han, In-Cheol Park
2008ISCASFast frequency acquisition all-digital PLL using PVT calibration.Hae-Soo Jeon, Duk-Hyun You, In-Cheol Park
2008ISCASCapacitor array structure and switch control for energy-efficient SAR analog-to-digital converters.Jeong-Sup Lee, In-Cheol Park
2008ISCASPrediction-based real-time CABAC decoder for high definition H.264/AVC.WonHee Son, In-Cheol Park
2008VTCTime-Domain Joint Estimation of Fine Symbol Timing Offset and Integer Carrier Frequency Offset.Tae-Hwan Kim, In-Cheol Park
2007ICCDTwiddle factor transformation for pipelined FFT processing.In-Cheol Park, WonHee Son, Ji-Hoon Kim
2007ISCASHigh Speed Sphere Decoding Based on Vertically Incremental Computation.Se-Hyeon Kang, In-Cheol Park
2007ISCASEnergy-Efficient Double-Binary Tail-Biting Turbo Decoder Based on Border Metric Encoding.Ji-Hoon Kim, In-Cheol Park
2007ISCASTiled Interleaving for Multi-Level 2-D Discrete Wavelet Transform.Jung-Wook Kim, Jinook Song, Seokho Lee, In-Cheol Park
2007VTCFast and Area-Efficient Sphere Decoding Using Look-Ahead Search.Se-Hyeon Kang, In-Cheol Park
2006ISCASLow-power hybrid turbo decoding based on reverse calculation.Hye-Mi Choi, Ji-Hoon Kim, In-Cheol Park
2006ISCASHigh speed decoding of context-based adaptive binary arithmetic codes using most probable symbol prediction.Chung-Hyo Kim, In-Cheol Park
2006ISCASCombined image signal processing for CMOS image sensors.Kimo Kim, In-Cheol Park
2005ISCASLow-power log-MAP turbo decoding based on reduced metric memory access.Dong-Soo Lee, In-Cheol Park
2005ISCASScheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutation.In-Cheol Park, Se-Hyeon Kang
2004ISCASMemory-based low density parity check code decoder architecture using loosely coupled two data-flows.Se-Hyeon Kang, In-Cheol Park
2004ISCASA fast Reed-Solomon Product-Code decoder without redundant computations.Hyun-Yong Lee, In-Cheol Park
2004ISCASQuadrature direct digital frequency synthesis using fine-grain angle rotation.Sung-Won Lee, In-Cheol Park
2003DACSAT-based unbounded symbolic model checking.Hyeong-Ju Kang, In-Cheol Park
2003ICASSPLow-power hybrid structure of digital matched filters for direct sequence spread spectrum systems.Sung-Won Lee, In-Cheol Park
2003ICCADFast Cycle-accurate Behavioral Simulation for Pipelined Processors Using Early Pipeline Evaluation.In-Cheol Park, Se-Hyeon Kang, Yongseok Yi
2003ISCASA 5-GHz self-calibrated I/Q clock generator using a quadrature LC-VCO.Hyung Ki Ahn, In-Cheol Park, Beomsup Kim
2003ISCASPairing and ordering to reduce hardware complexity in cascade form filter design.Hyeong-Ju Kang, In-Cheol Park
2003ISCASA 24-bit floating-point audio DSP controller supporting fast exponentiation.Sung-Won Lee, Hyeong-Ju Kang, In-Cheol Park
2003ISCASArea-efficient memory-based architecture for FFT processing.Sang-Chul Moon, In-Cheol Park
2003ISCASHistory-based memory mode prediction for improving memory performance.Seong-Il Park, In-Cheol Park
2003ISCASA hybrid delta-sigma modulator with adaptive calibration.Jae Hoon Shim, In-Cheol Park, Beomsup Kim
2002DACTimed compiled-code simulation of embedded software for performance analysis of SOC design.Jong-Yeol Lee, In-Cheol Park
2002ICASSPA high-speed and low-latency Reed-Solomon decoder based on a dual-line structure.Hyeong-Ju Kang, In-Cheol Park
2002ISCASLow cost floating-point unit design for audio applications.Sung-Won Lee, In-Cheol Park
2002ISCASArea-efficient digital baseband module for Bluetooth wireless communications.Myoung-Cheol Shin, Seong-Il Park, Sung-Won Lee, Se-Hyeon Kang, In-Cheol Park
2001ASPDACLow-power high-level synthesis using latches.Woo-Seung Yang, In-Cheol Park, Chong-Min Kyung
2001DACDigital Filter Synthesis Based on Minimal Signed Digit Representation.In-Cheol Park, Hyeong-Ju Kang
2001ICCDAn Area-Efficient Iterative Modified-Booth Multiplier Based on Self-Timed Clocking.Myoung-Cheol Shin, Se-Hyeon Kang, In-Cheol Park
2001ISCASMultiplier-less IIR filter synthesis algorithms to trade-off the delay and the number of adders.Hyeong-Ju Kang, In-Cheol Park
2001ISCASGlobal variable localization and transformation for hardware synthesis from high-level programming language description.Jong-Yeol Lee, In-Cheol Park
2001ISCASA low-power variable length decoder based on successive decoding of shoft codewords.Sung-Won Lee, In-Cheol Park
2000ASPDACA hardware accelerator for the specular intensity of phong illumination model in 3-dimensional graphics.Young-Su Kwon, In-Cheol Park, Chong-Min Kyung
2000ICCADFIR Filter Synthesis Algorithms for Minimizing the Delay and the Number of Adders.Hyeong-Ju Kang, Hansoo Kim, In-Cheol Park
2000ICCDSynthesis and Optimization of Interface Hardware between IP's Operating at Different Clock Frequencies.Bong-Il Park, Hoon Choi, In-Cheol Park, Chong-Min Kyung
2000ICIPPyramid Texture Compression and Decompression Using Interpolative Vector Quantization.Young-Su Kwon, In-Cheol Park, Chong-Min Kyung
2000VCIPArray address translation for SDRAM-based video processing applications.Hansoo Kim, In-Cheol Park
2000VCIPOptimal down-conversion in compressed DCT domain with minimal operations.Myoung-Cheol Shin, In-Cheol Park
1999ASPDACNode Sampling Technique to Speed Up Probability-Based Power Estimation Methods.Hoon Choi, Hansoo Kim, In-Cheol Park, Seung Ho Hwang, Chong-Min Kyung
1999ASPDACA New Single-Clock Flip-Clop for Half-Swing Clocking.Young-Su Kwon, Bong-Il Park, In-Cheol Park, Chong-Min Kyung
1999DACVerification of a Microprocessor Using Real World Applications.You-Sung Chang, Seungjong Lee, In-Cheol Park, Chong-Min Kyung
1999DACExploiting Intellectual Properties in ASIP Designs for Embedded DSP Software.Hoon Choi, Ju Hwan Yi, Jong-Yeol Lee, In-Cheol Park, Chong-Min Kyung
1999ICCDCustomization of a CISC Processor Core for Low-Power Applications.You-Sung Chang, Bong-Il Park, In-Cheol Park, Chong-Min Kyung
1999ICCDA Regular Layout Structured Multiplier Based on Weighted Carry-Save Adders.Bong-Il Park, In-Cheol Park, Chong-Min Kyung
1998DACVirtual Chip: Making Functional Models Work on Real Target Systems.Namseung Kim, Hoon Choi, Seungjong Lee, Seungwang Lee, In-Cheol Park, Chong-Min Kyung
1998DACMetaCore: An Application Specific DSP Development System.Jin-Hyuk Yang, Byoung-Woon Kim, Sang-Jun Nam, Jang-Ho Cho, Sung-Won Seo, Chang-Ho Ryu, Young-Su Kwon, Dae-Hyun Lee, Jong-Yeol Lee, Jong-Sun Kim, Hyun-Dhong Yoon, Jae-Yeol Kim, Kun-Moo Lee, Chan-Soo Hwang, In-Hyung Kim, Jun Sung Kim, Kwang-Il Park, Kyu Ho Park, Yong Hoon Lee, Seung Ho Hwang, In-Cheol Park, Chong-Min Kyung
1998DATEMultiple Behavior Module Synthesis Based on Selective Groupings.Ju Hwan Yi, Hoon Choi, In-Cheol Park, Seung Ho Hwang, Chong-Min Kyung
1998ICCADSynthesis of application specific instructions for embedded DSP software.Hoon Choi, Seung Ho Hwang, Chong-Min Kyung, In-Cheol Park
1997ASPDACHK386: an x86-compatible 32-bit CISC microprocessor.Chong-Min Kyung, In-Cheol Park, Se-Kyoung Hong, K. S. Seong, B. S. Kong, Seungjong Lee, Hoon Choi, S. R. Maeng, D. T. Kim, Jong-Sun Kim, S. H. Park, Y. J. Kang
1997ASPDACMulti-project chip activities in Korea-IDEC perspective.Chong-Min Kyung, In-Cheol Park, Ho-Jun Song
1997ASPDACSingle cycle access cache for the misaligned data and instruction prefetch.Joon-Seo Yim, Hee-Choul Lee, Tae-Hoon Kim, Bong-Il Park, Chang-Jae Park, In-Cheol Park, Chong-Min Kyung
1997ASPDACVerification methodology of compatible microprocessors.Joon-Seo Yim, Chang-Jae Park, Woo-Seung Yang, Hun-Seung Oh, Hee-Choul Lee, Hoon Choi, Tae-Hoon Kim, Seungjong Lee, Nara Won, Yung-Hei Lee, In-Cheol Park, Chong-Min Kyung
1997DACA C-Based RTL Design Verification Methodology for Complex Microprocessor.Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon Choi, Woo-Seung Yang, Hun-Seung Oh, In-Cheol Park, Chong-Min Kyung
1991DACFast and Near Optimal Scheduling in Automatic Data Path Aynthesis.In-Cheol Park, Chong-Min Kyung
1990ICCADAn O(Se-Kyoung Hong, In-Cheol Park, Chong-Min Kyung