J. H. Lou
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
1994–1994
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1994 | ISCAS | A BiCMOS Dynamic Multiplier Using Wallace Tree Reduction Architecture and 1.5V Full-Swing BiCMOS Dynamic Logic Circuit. | James B. Kuo, K. W. Su, J. H. Lou |