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J. Rubn Titos Gil

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

14

Venues

8

Active years

2008–2024

Best venue rank

A*

Where they publish

Papers

14 indexed papers, newest first.

YearVenueTitleAuthors
2024MICROChaining Transactions for Effective Concurrency Management in Hardware Transactional Memory.Vctor Nicols-Conesa, J. Rubn Titos Gil, Ricardo Fernndez-Pascual, Manuel E. Acacio, Alberto Ros
2022PDPAnalysis of the Interactions Between ILP and TLP With Hardware Transactional Memory.Vctor Nicols-Conesa, J. Rubn Titos Gil, Ricardo Fernndez-Pascual, Alberto Ros, Manuel E. Acacio
2021MICROEfficient, Distributed, and Non-Speculative Multi-Address Atomic Operations.Eduardo Jos Gmez-Hernndez, Juan M. Cebrian, J. Rubn Titos Gil, Stefanos Kaxiras, Alberto Ros
2017ICSWay-combining directory: an adaptive and scalable low-cost coherence directory.J. Rubn Titos Gil, Antonio Flores, Ricardo Fernndez-Pascual, Alberto Ros, Manuel E. Acacio
2016DATEEnergy minimization at all layers of the data center: The ParaDIME project.Oscar Palomar, Santhosh Kumar Rethinagiri, Gulay Yalcin, J. Rubn Titos Gil, Pablo Prieto, Emma Torrella, Osman S. Unsal, Adrin Cristal, Pascal Felber, Anita Sobe, Yaroslav Hayduk, Mascha Kurpicz, Christof Fetzer, Thomas Knauth, Malte Schneega, Jens Struckmeier, Dragomir Milojevic
2015ICPPDiMP: Architectural Support for Direct Message Passing on Shared Memory Multi-cores.J. Rubn Titos Gil, Oscar Palomar, Osman S. Unsal, Adrin Cristal
2015ICPPEnhancing Garbage Collection Synchronization Using Explicit Bit Barriers.Jochen Hollmann, J. Rubn Titos Gil, Per Stenstrm
2012HPCAπ-TM: Pessimistic invalidation for scalable lazy hardware transactional memory.Anurag Negi, J. Rubn Titos Gil, Manuel E. Acacio, Jos M. Garca, Per Stenstrm
2012PDPDynamic Serialization: Improving Energy Consumption in Eager-Eager Hardware Transactional Memory Systems.Epifanio Gaona-Ramrez, J. Rubn Titos Gil, Manuel E. Acacio, Juan Fernndez
2011ICPPEager Meets Lazy: The Impact of Write-Buffering on Hardware Transactional Memory.Anurag Negi, J. Rubn Titos Gil, Manuel E. Acacio, Jos M. Garca, Per Stenstrm
2011ICSZEBRA: a data-centric, hybrid-policy hardware transactional memory design.J. Rubn Titos Gil, Anurag Negi, Manuel E. Acacio, Jos M. Garca, Per Stenstrm
2010SBAC-PADCharacterizing Energy Consumption in Hardware Transactional Memory Systems.Epifanio Gaona-Ramrez, J. Rubn Titos Gil, Juan Fernndez, Manuel E. Acacio
2008HiPCDirectory-Based Conflict Detection in Hardware Transactional Memory.J. Rubn Titos Gil, Manuel E. Acacio, Jos M. Garca
2008PDPCharacterization of Conflicts in Log-Based Transactional Memory (LogTM).J. Rubn Titos Gil, Manuel E. Acacio, Jos Manuel Garca Carrasco