J. S. Yuan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2003–2003
Best venue rank
C
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2003 | ISCAS | Design of enhancement current-balanced logic for mixed-signal ICs. | Li Yang, J. S. Yuan |
| 2003 | VLSID | An Adaptive Supply-Voltage Scheme for Low Power Self-Timed CMOS Digital Design. | W. Kuang, J. S. Yuan |