Jagdish Nayayan Pandey
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
2007–2013
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | VLSID | A 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node. | Aatmesh Shrivastava, Jagdish Nayayan Pandey, Brian P. Otis, Benton H. Calhoun |
| 2011 | ISCAS | A 1.5 GHz high-Q receiver based on current reuse. | Jianlei Shi, Jagdish Nayayan Pandey, Brian P. Otis |
| 2009 | ISCAS | Design Techniques for Self-powered Microsystems. | Brian P. Otis, Robert G. Egbert, S. Haq, Jeremy Holleman, Julie R. Hu, Y. Liao, Jagdish Nayayan Pandey, Shailesh Rai, Fan Zhang |
| 2008 | ISCAS | Quadrature generation techniques for frequency multiplication based oscillators. | Jagdish Nayayan Pandey, Bharadwaj Amrutur, Sudhir S. Kudva |
| 2007 | VLSID | A Low Power Frequency Multiplication Technique for ZigBee Transciever. | Jagdish Nayayan Pandey, Sudhir S. Kudva, Bharadwaj Amrutur |