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James D. Balfour

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

6

Active years

2006–2014

Best venue rank

A*

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2014ICSAuthor retrospective for design tradeoffs for tiled CMP on-chip networks.William J. Dally, James D. Balfour
2013ISPASSA detailed and flexible cycle-accurate Network-on-Chip simulator.Nan Jiang, Daniel U. Becker, George Michelogiannakis, James D. Balfour, Brian Towles, David E. Shaw, John Kim, William J. Dally
2010CASESFine-grain dynamic instruction placement for L0 scratch-pad memory.JongSoo Park, James D. Balfour, William J. Dally
2009HPCAElastic-buffer flow control for on-chip networks.George Michelogiannakis, James D. Balfour, William J. Dally
2007DATERegister pointer architecture for efficient embedded processors.JongSoo Park, Sung-Boem Park, James D. Balfour, David Black-Schaffer, Christos Kozyrakis, William J. Dally
2007MICROFlattened Butterfly Topology for On-Chip Networks.John Kim, James D. Balfour, William J. Dally
2006ICSDesign tradeoffs for tiled CMP on-chip networks.James D. Balfour, William J. Dally