| 2014 | ICS | Author retrospective for code scheduling and register allocation in large basic blocks. | James R. Goodman, Wei-Chung Hsu |
| 2011 | ICS | Transactional conflict decoupling and value prediction. | Fuad Tabba, Andrew W. Hay, James R. Goodman |
| 2009 | SPAA | NZTM: nonblocking zero-indirection transactional memory. | Fuad Tabba, Mark Moir, James R. Goodman, Andrew W. Hay, Cong Wang |
| 2003 | ICS | Inferential queueing and speculative push for reducing critical communication latencies. | Ravi Rajwar, Alain Kgi, James R. Goodman |
| 2002 | ASPLOS | Transactional lock-free execution of lock-based programs. | Ravi Rajwar, James R. Goodman |
| 2001 | MICRO | Speculative lock elision: enabling highly concurrent multithreaded execution. | Ravi Rajwar, James R. Goodman |
| 2000 | HPCA | Improving the Throughput of Synchronization by Insertion of Delays. | Ravi Rajwar, Alain Kgi, James R. Goodman |
| 1999 | HPCA | Improving CC-NUMA Performance Using Instruction-Based Prediction. | Stefanos Kaxiras, James R. Goodman |
| 1998 | ISCA | Retrospective: Using Cache Memory to Reduce Processor-Memory Traffic. | James R. Goodman |
| 1998 | ISCA | Using Cache Memory to Reduce Processor-Memory Traffic. | James R. Goodman |
| 1998 | ICS | A Study of Three Dynamic Approaches to Handle Widely Shared Data in Shared-memory Multiprocessors. | Stefanos Kaxiras, Stein Gjessing, James R. Goodman |
| 1997 | ISCA | DataScalar Architectures. | Doug Burger, Stefanos Kaxiras, James R. Goodman |
| 1997 | ISCA | Efficient Synchronization: Let Them Eat QOLB. | Alain Kgi, Doug Burger, James R. Goodman |
| 1996 | ISCA | Memory Bandwidth Limitations of Future Microprocessors. | Doug Burger, James R. Goodman, Alain Kgi |
| 1996 | ICS | The GLOW Cache Coherence Protocol Extensions for Widely Shared Data. | Stefanos Kaxiras, James R. Goodman |
| 1995 | ICS | Techniques for Reducing Overheads of Shared-Memory Multiprocessing. | Alain Kgi, Nagi Aboulenein, Doug Burger, James R. Goodman |
| 1992 | ICPP | Synthesizing General Topologies from Rings. | Ross E. Johnson, James R. Goodman |
| 1992 | ISCA | Performance of the SCI Ring. | Steven L. Scott, James R. Goodman, Mary K. Vernon |
| 1989 | ASPLOS | Efficent Synchronization Primitives for Large-Scale Cache-Coherent Multiprocessors. | James R. Goodman, Mary K. Vernon, Philip J. Woest |
| 1989 | ICS | Restricted Fetch&Phi operations for parallel processing. | Gurindar S. Sohi, James E. Smith, James R. Goodman |
| 1988 | ISCA | The Wisconsin Multicube: A New Large-Scale Cache-Coherent Multiprocessor. | James R. Goodman, Philip J. Woest |
| 1988 | ICS | Code scheduling and register allocation in large basic blocks. | James R. Goodman, Wei-Chung Hsu |
| 1987 | ASPLOS | Coherency for Multiprocessor Virtual Address Caches. | James R. Goodman |
| 1987 | ISCA | WISQ: A Restartable Architecture Using Queues. | Andrew R. Pleszkun, James R. Goodman, Wei-Chung Hsu, R. T. Joersz, George E. Bier, Philip J. Woest, P. B. Schechter |
| 1986 | ICPP | The Design of a Queue-Based Vector Supercomputer. | Honesty C. Young, James R. Goodman |
| 1986 | ISCA | On the Use of Registers vs. Cache to Minimize Memory Traffic. | James R. Goodman, Wei-Chung Hsu |
| 1985 | ISCA | PIPE: A VLSI Decoupled Architecture. | James R. Goodman, Jian-tu Hsieh, Koujuch Liou, Andrew R. Pleszkun, P. B. Schechter, Honesty C. Young |
| 1984 | ISCA | The Use of Static Column RAM as a Memory Hierarchy. | James R. Goodman, MenChow Chiang |
| 1983 | ISCA | Using Cache Memory to Reduce Processor-Memory Traffic | James R. Goodman |
| 1983 | ISCA | A Study of Instruction Cache Organizations and Replacement Policies | James E. Smith, James R. Goodman |