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Jan Schmidt

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

30

Venues

5

Active years

2002–2024

Best venue rank

C

Where they publish

Papers

30 indexed papers, newest first.

YearVenueTitleAuthors
2024DDECSA Comparison of Logic Extraction Methods in Hardware-Translated Neural Networks.Jan Schmidt, Petr Fiser, Miroslav Skrbek
2024DDECSAdaptive Input Normalization for Quantized Neural Networks.Jan Schmidt, Petr Fiser, Miroslav Skrbek
2023DDECSReducing Output Response Aliasing Using Boolean Optimization Techniques.Robert Hlle, Petr Fiser, Jan Schmidt
2020DDECSStandard Cell Tuning Enables Data-Independent Static Power Consumption.Jan Belohoubek, Petr Fiser, Jan Schmidt
2019DDECSUsing Voters May Lead to Secret Leakage.Jan Belohoubek, Petr Fiser, Jan Schmidt
2019DDECSAnalyzing and Optimizing the Dummy Rounds Scheme.Stanislav Jerabek, Jan Schmidt
2019DSDCMOS Illumination Discloses Processed Data.Jan Belohoubek, Petr Fiser, Jan Schmidt
2019ETFAI4.0-compliant integration of assets utilizing the Asset Administration Shell.Jonathan Fuchs, Jan Schmidt, Jrg Franke, Kasim Rehman, Manuel Sauer, Stamatis Karnouskos
2019IIWASWeighted Load Balancing in Distributed Hash Tables.Robin Lsch, Jan Schmidt, Nils gentschen Felde
2018DSDDummy Rounds as a DPA Countermeasure in Hardware.Stanislav Jerabek, Jan Schmidt, Martin Novotn, Vojtech Miskovsk
2017DDECSAre XORs in logic synthesis really necessary?Ivo Hlecek, Petr Fiser, Jan Schmidt
2017DSDSAT-Based Generation of Optimum Function Implementations with XOR Gates.Petr Fiser, Ivo Hlecek, Jan Schmidt
2017DSDSAT-Based ATPG for Zero-Aliasing Compaction.Robert Hlle, Petr Fiser, Jan Schmidt
2016DSDError Correction Method Based on the Short-Duration Offline Test.Jan Belohoubek, Petr Fiser, Jan Schmidt
2015DSDNovel C-Element Based Error Detection and Correction Method Combining Time and Area Redundancy.Jan Belohoubek, Petr Fiser, Jan Schmidt
2014DDECSSources of bias in EDA tools and its influence.Petr Fiser, Jan Schmidt, Jiri Balcarek
2014DSDPBO-Based Test Compression.Jiri Balcarek, Petr Fiser, Jan Schmidt
2014DSDOn Robustness of EDA Tools.Jan Schmidt, Petr Fiser, Jiri Balcarek
2013DSDSimulation and SAT Based ATPG for Compressed Test Generation.Jiri Balcarek, Petr Fiser, Jan Schmidt
2012DDECSImproving the iterative power of resynthesis.Petr Fiser, Jan Schmidt
2012DSDThe Influence of Implementation Technology on Dependability Parameters.Jan Schmidt, Petr Fiser, Jiri Balcarek
2011DSDTechniques for SAT-Based Constrained Test Pattern Generation.Jiri Balcarek, Petr Fiser, Jan Schmidt
2010DDECSOn logic synthesis of conventionally hard to synthesize circuits using genetic programming.Petr Fiser, Jan Schmidt, Zdenek Vascek, Luks Sekanina
2010DSDTest Patterns Compression Technique Based on a Dedicated SAT-Based ATPG.Jiri Balcarek, Petr Fiser, Jan Schmidt
2009DSDThe Case for a Balanced Decomposition Process.Jan Schmidt, Petr Fiser
2007DSDGeneral Digit-Serial Normal Basis Multiplier with Distributed Overlap.Martin Novotn, Jan Schmidt
2006DDECSNormal Basis Multipliers of General Digit Width Applicable in Elliptic Curve Cryptography.Martin Novotn, Jan Schmidt
2006DSDTwo Architectures of a General Digit-Serial Normal Basis Multiplier.Martin Novotn, Jan Schmidt
2006FPLGeneral Digit Width Normal Basis Multipliers with Circular and Linear Structure.Martin Novotn, Jan Schmidt
2002FPLExploration of Design Space in ECDSA.Jan Schmidt, Martin Novotn, Martin Jger, Milos Becvr, Michal Jchim