Jayesh Gaur
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
16
Venues
5
Active years
2007–2024
Best venue rank
A*
Where they publish
Papers
16 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | ISCA | Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution. | Rahul Bera, Adithya Ranganathan, Joydeep Rakshit, Sujit Mahto, Anant V. Nori, Jayesh Gaur, Ataberk Olgun, Konstantinos Kanellopoulos, Mohammad Sadrosadati, Sreenivas Subramoney, Onur Mutlu |
| 2022 | ISCA | Register file prefetching. | Sudhanshu Shukla, Sumeet Bandishte, Jayesh Gaur, Sreenivas Subramoney |
| 2022 | MICRO | Speculative Code Compaction: Eliminating Dead Code via Speculative Microcode Transformations. | Logan Moody, Wei Qi, Abdolrasoul Sharifi, Layne Berry, Joey Rudek, Jayesh Gaur, Jeff Parkhurst, Sreenivas Subramoney, Kevin Skadron, Ashish Venkat |
| 2021 | HPCA | Stream Floating: Enabling Proactive and Decentralized Cache Optimizations. | Zhengrong Wang, Jian Weng, Jason Lowe-Power, Jayesh Gaur, Tony Nowatzki |
| 2021 | MICRO | Cryptographic Capability Computing. | Michael LeMay, Joydeep Rakshit, Sergej Deutsch, David M. Durham, Santosh Ghosh, Anant Nori, Jayesh Gaur, Andrew Weiler, Salmin Sultana, Karanvir Grewal, Sreenivas Subramoney |
| 2020 | ISCA | Focused Value Prediction. | Sumeet Bandishte, Jayesh Gaur, Zeev Sperber, Lihu Rappoport, Adi Yoaz, Sreenivas Subramoney |
| 2020 | ISCA | Auto-Predication of Critical Branches. | Adarsh Chauhan, Jayesh Gaur, Zeev Sperber, Franck Sala, Lihu Rappoport, Adi Yoaz, Sreenivas Subramoney |
| 2019 | ICCD | Bandwidth-Aware Last-Level Caching: Efficiently Coordinating Off-Chip Read and Write Bandwidth. | Mainak Chaudhuri, Jayesh Gaur, Sreenivas Subramoney |
| 2019 | ISCA | Post-silicon CPU adaptation made practical using machine learning. | Stephen J. Tarsa, Rangeen Basu Roy Chowdhury, Julien Sebot, Gautham N. Chinya, Jayesh Gaur, Karthik Sankaranarayanan, Chit-Kwan Lin, Robert Chappell, Ronak Singhal, Hong Wang |
| 2018 | ISCA | Density Tradeoffs of Non-Volatile Memory as a Replacement for SRAM Based Last Level Cache. | Kunal Korgaonkar, Ishwar Bhati, Huichu Liu, Jayesh Gaur, Sasikanth Manipatruni, Sreenivas Subramoney, Tanay Karnik, Steven Swanson, Ian Young, Hong Wang |
| 2018 | ISCA | Criticality Aware Tiered Cache Hierarchy: A Fundamental Relook at Multi-Level Cache Hierarchies. | Anant Nori, Jayesh Gaur, Siddharth Rai, Sreenivas Subramoney, Hong Wang |
| 2017 | HPCA | Near-Optimal Access Partitioning for Memory Hierarchies with Multiple Heterogeneous Bandwidth Sources. | Jayesh Gaur, Mainak Chaudhuri, Pradeep Ramachandran, Sreenivas Subramoney |
| 2016 | ISCA | Base-Victim Compression: An Opportunistic Cache Compression Architecture. | Jayesh Gaur, Alaa R. Alameldeen, Sreenivas Subramoney |
| 2013 | MICRO | Efficient management of last-level caches in graphics processors for 3D scene rendering workloads. | Jayesh Gaur, Raghuram Srinivasan, Sreenivas Subramoney, Mainak Chaudhuri |
| 2011 | ISCA | Bypass and insertion algorithms for exclusive last-level caches. | Jayesh Gaur, Mainak Chaudhuri, Sreenivas Subramoney |
| 2007 | DAC | Leveraging Semi-Formal and Sequential Equivalence Techniques for Multimedia SOC Performance Validation. | Lovleen Bhatia, Jayesh Gaur, Praveen Tiwari, Raj S. Mitra, Sunil H. Matange |