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Jeferson Santiago da Silva

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

5

Active years

2018–2021

Best venue rank

A

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2021FPGADesign Principles for Packet Deparsers on FPGAs.Thomas Luinaud, Jeferson Santiago da Silva, J. M. Pierre Langlois, Yvon Savaria
2020FPGAUnleashing the Power of FPGAs as Programmable Switches.Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois
2020HPSRBridging the Gap: FPGAs as Programmable Switches.Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois
2019FCCMModule-per-Object: A Human-Driven Methodology for C++-Based High-Level Synthesis Design.Jeferson Santiago da Silva, Franois-Raymond Boyer, J. M. Pierre Langlois
2018FPGAP4-Compatible High-Level Synthesis of Low Latency 100 Gb/s Streaming Packet Parsers in FPGAs.Jeferson Santiago da Silva, Franois-Raymond Boyer, J. M. Pierre Langlois
2018ICNPOne for All, All for One: A Heterogeneous Data Plane for Flexible P4 Processing.Jeferson Santiago da Silva, Thibaut Stimpfling, Thomas Luinaud, Bachir Fradj, Bochra Boughzala
2018NetSoftExtern Objects in P4: an ROHC Header Compression Scheme Case Study.Jeferson Santiago da Silva, Franois-Raymond Boyer, Laurent-Olivier Chiquette, J. M. Pierre Langlois