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Jens Lienig

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

19

Venues

7

Active years

1994–2021

Best venue rank

A*

Where they publish

Papers

19 indexed papers, newest first.

YearVenueTitleAuthors
2021ICCADExploring Physical Synthesis for Circuits based on Emerging Reconfigurable Nanotechnologies.Andreas Krinke, Shubham Rai, Akash Kumar, Jens Lienig
2021ICCADToward Security Closure in the Face of Reliability Effects ICCAD Special Session Paper.Jens Lienig, Susann Rothe, Matthias Thiele, Nikhil Rangarajan, Mohammed Ashraf, Mohammed Nabeel, Hussam Amrouch, Ozgur Sinanoglu, Johann Knechtel
2019DATEAssembly-Related Chip/Package Co-Design of Heterogeneous Systems Manufactured by Micro-Transfer Printing.Robert Fischbach, Tilman Horst, Jens Lienig
2019DDECSFrom Constraints to Tape-Out: Towards a Continuous AMS Design Flow.Andreas Krinke, Tilman Horst, Georg Glser, Martin Grabmann, Tobias Markus, Benjamin Prautsch, Uwe Hatnik, Jens Lienig
2018ASPDACOptimal die placement for interposer-based 3D ICs.Sergii Osmolovskyi, Johann Knechtel, Igor L. Markov, Jens Lienig
2018ICCADThe need and opportunities of electromigration-aware integrated circuit design.Steve Bigalke, Jens Lienig, Gran Jerke, Jrgen Scheible, Roland Jancke
2014ASPDACStructural planning of 3D-IC interconnects by block alignment.Johann Knechtel, Evangeline F. Y. Young, Jens Lienig
2012ICCADMultiobjective optimization of deadspace, a critical resource for 3D-IC integration.Johann Knechtel, Igor L. Markov, Jens Lienig, Matthias Thiele
2008DATENovel Pin Assignment Algorithms for Components with Very High Pin Counts.Tilo Meister, Jens Lienig, Gisbert Thomke
2005VLSIDElectromigration-Aware Physical Design of Integrated Circuits.Jens Lienig, Gran Jerke
2004DACReliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs.Goeran Jerke, Jens Lienig, Jrgen Scheible
2003ASPDACCurrent-driven wire planning for electromigration avoidance in analog circuits.Jens Lienig, Gran Jerke
2002DATEHierarchical Current Density Verification for Electromigration Analysis in Arbitrary Shaped Metallization Patterns of Analog Circuits.Goeran Jerke, Jens Lienig
2002VLSIDElectromigration Avoidance in Analog Circuits: Two Methodologies for Current-Driven Routing.Jens Lienig, Goeran Jerke, Thorsten Adler
2001DATEAnalogRouter: a new approach of current-driven routing for analog circuits.Jens Lienig, Goeran Jerke, Thorsten Adler
1997VLSIDChannel and Switchbox Routing with Minimized Crosstalk - A Parallel Genetic Algorithm Approach.Jens Lienig
1996PPSNGenetic Algorithms Applied to the Physical Design of VLSI Circuits: A Survey.Jens Lienig, James P. Cohoon
1994PPSNAn Evolutionary Algorithm for the Routing of Multi-Chip Modules.Jens Lienig, Holger Brandt
1994VLSIDA New Genetic Algorithm for the Channel Routing Problem.Jens Lienig, Krishnaiyan Thulasiraman