Jir Matys
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
2017–2022
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | DSD | Designing Approximate Arithmetic Circuits with Combined Error Constraints. | Milan Ceska, Jir Matys, Vojtech Mrazek, Toms Vojnar |
| 2020 | SAT | Satisfiability Solving Meets Evolutionary Optimisation in Designing Approximate Circuits. | Milan Ceska, Jir Matys, Vojtech Mrazek, Toms Vojnar |
| 2018 | CAV | ADAC: Automated Design of Approximate Circuits. | Milan Ceska, Jir Matys, Vojtech Mrazek, Luks Sekanina, Zdenek Vascek, Toms Vojnar |
| 2017 | ICCAD | Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished. | Milan Ceska, Jir Matys, Vojtech Mrazek, Luks Sekanina, Zdenek Vascek, Toms Vojnar |