Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished.
Milan Ceska, Jir Matys, Vojtech Mrazek, Luks Sekanina, Zdenek Vascek, Toms Vojnar
Browse the full ICCAD paper archive.
Milan Ceska, Jir Matys, Vojtech Mrazek, Luks Sekanina, Zdenek Vascek, Toms Vojnar
Browse the full ICCAD paper archive.