Jo Vliegen
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
17
Venues
10
Active years
2009–2024
Best venue rank
C
Where they publish
Papers
17 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | GECCO | A Systematic Exploration of Evolutionary Computation for the Design of Hardware-oriented Non-cryptographic Hash Functions. | Mujtaba Hassan, Jo Vliegen, Stjepan Picek, Nele Mentens |
| 2023 | SRDS | ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks. | Simon Scherrer, Jo Vliegen, Arish Sateesan, Hsu-Chun Hsiao, Nele Mentens, Adrian Perrig |
| 2022 | SEC | FOCUS: Frequency Based Detection of Covert Ultrasonic Signals. | Wouter Hellemans, Md Masoom Rabbani, Jo Vliegen, Nele Mentens |
| 2021 | DSD | Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA. | Thomas Claesen, Arish Sateesan, Jo Vliegen, Nele Mentens |
| 2021 | FCCM | Trusted Configuration in Cloud FPGAs. | Shaza Zeitouni, Jo Vliegen, Tommaso Frassetto, Dirk Koch, Ahmad-Reza Sadeghi, Nele Mentens |
| 2021 | FPL | Speed Records in Network Flow Measurement on FPGA. | Arish Sateesan, Jo Vliegen, Simon Scherrer, Hsu-Chun Hsiao, Adrian Perrig, Nele Mentens |
| 2021 | SENSYS | RESERVE: Remote Attestation of Intermittent IoT devices. | Md Masoom Rabbani, Edlira Dushku, Jo Vliegen, An Braeken, Nicola Dragoni, Nele Mentens |
| 2021 | SRDS | Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows. | Simon Scherrer, Che-Yu Wu, Yu-Hsi Chiang, Benjamin Rothenberger, Daniele Enrico Asoni, Arish Sateesan, Jo Vliegen, Nele Mentens, Hsu-Chun Hsiao, Adrian Perrig |
| 2020 | DSD | Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications. | Arish Sateesan, Jo Vliegen, Joan Daemen, Nele Mentens |
| 2020 | ISCAS | SHeFU: Secure Hardware-Enabled Protocol for Firmware Updates. | Md Masoom Rabbani, Jo Vliegen, Mauro Conti, Nele Mentens |
| 2019 | DATE | SACHa: Self-Attestation of Configurable Hardware. | Jo Vliegen, Md Masoom Rabbani, Mauro Conti, Nele Mentens |
| 2018 | DSD | Design of a Fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves. | Niels Pirotte, Jo Vliegen, Lejla Batina, Nele Mentens |
| 2017 | FPL | The Monte Carlo PUF. | Vladimir Rozic, Bohan Yang, Jo Vliegen, Nele Mentens, Ingrid Verbauwhede |
| 2016 | CARDIS | PRNGs for Masking Applications and Their Mapping to Evolvable Hardware. | Stjepan Picek, Bohan Yang, Vladimir Rozic, Jo Vliegen, Jori Winderickx, Thomas De Cnudde, Nele Mentens |
| 2013 | FPL | Remote FPGA design through eDiViDe - European Digital Virtual Design Lab. | Jochen Vandorpe, Jo Vliegen, Ruben Smeets, Nele Mentens, Milos Drutarovsk, Michal Varchola, Kerstin Lemke-Rust, Paul Plger, Peter Samarin, Dirk Koch, Yngve Hafting, Jim Trresen |
| 2012 | DSD | Hardware Strengthening a Distributed Logging Scheme. | Jo Vliegen, Karel Wouters, Christian Grahn, Tobias Pulls |
| 2009 | FPL | Secure FPGA technologies and techniques. | An Braeken, Serge Kubera, Frederik Trouillez, Abdellah Touhafi, Nele Mentens, Jo Vliegen |