Joao Geada
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2007–2008
Best venue rank
A*
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | DAC | Transistor level gate modeling for accurate and fast timing, noise, and power analysis. | Shiva Raja, F. Varadi, Murat R. Becer, Joao Geada |
| 2007 | ICCAD | Victim alignment in crosstalk aware timing analysis. | Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer, Joao Geada |