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Johan Verfaillie

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

2

Venues

1

Active years

1999–2003

Best venue rank

B

Where they publish

Papers

2 indexed papers, newest first.

YearVenueTitleAuthors
2003ETSDebug architecture for system on chip taking full advantage of the test access port.Erik Moerman, Sbastien Bocq, Johan Verfaillie
1999ETSApplication of supply current testing to analogue circuits, towards a structural analogue test methodology.Hans A. R. Manhaeve, Johan Verfaillie, B. Straka, J. P. Cornil