| 2025 | ICASSP | Efficient Co-Approximate Parallel Compressive Depth Reconstruction on FPGA. | Yun Wu, John McAllister |
| 2021 | FPL | An Emulation of Quantum Error-Correction on an FPGA device. | Michael Hart, John McAllister, Leo Rogers, Charles Gillan |
| 2020 | ICASSP | Programmable Dataflow Accelerators: A 5G OFDM Modulation/Demodulation Case Study. | Yun Wu, Peng Wang, John McAllister |
| 2019 | ICASSP | EMG Wrist-hand Motion Recognition System for Real-time Embedded Platform. | Sumit A. Raurale, John McAllister, Jess Martnez del Rincn |
| 2019 | ICASSP | On Modified Squared Givens Rotations for Sphere Decoder Preprocessing. | Yun Wu, John McAllister |
| 2019 | ISCAS | Window Size Estimation for Nearest Neighbour Compliant Quantum Circuit Mapping. | Leo Rogers, John McAllister |
| 2018 | ICASSP | Emg Acquisition and Hand Pose Classification for Bionic Hands from Randomly-Placed Sensors. | Sumit A. Raurale, John McAllister, Jess Martnez del Rincn |
| 2017 | ICASSP | Multicore distributed dictionary learning: A microarray gene expression biclustering case study. | Stephen Laide, John McAllister |
| 2013 | FC | Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE. | Ciara Moore, Neil Hanley, John McAllister, Mire O'Neill, Elizabeth O'Sullivan, Xiaolin Cao |
| 2013 | ICASSP | Soft-core stream processing on FPGA: An FFT case study. | Peng Wang, John McAllister, Yun Wu |
| 2012 | ICASSP | Valved dataflow for FPGA memory hierarchy synthesis. | Matthew Milford, John McAllister |
| 2008 | FPL | Power efficient DSP datapath configuration methodology for FPGA. | Stephen McKeown, Roger F. Woods, John McAllister |
| 2008 | ICASSP | Modified givens rotations and their application to matrix inversion. | Lei Ma, Kevin Dickson, John McAllister, John V. McCanny |
| 2005 | FCCM | Core-Based Methodology: An Automated Approach for Implementing a Complete System from Algorithms to a Heterogeneous Network including FPGAs. | Jasmine Lam, John McAllister, Jennifer Dudley |
| 2005 | ICASSP | Rapid generation of hardware functionality in heterogeneous platforms [FPGA implementation applications]. | Darren Gerard Reilly, Roger F. Woods, John McAllister, Richard L. Walke |