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John Sartori

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

34

Venues

18

Active years

2009–2022

Best venue rank

A*

Where they publish

Papers

34 indexed papers, newest first.

YearVenueTitleAuthors
2022DACA scalable symbolic simulation tool for low power embedded systems.Subhash Sethumurugan, Shashank Hegde, Hari Cherupalli, John Sartori
2022ICMLATowards Fairness and Interpretability: Clinical Decision Support for Acute Coronary Syndrome.Himanshu S. Sahoo, Nicholas Ingraham, Greg M. Silverman, John Sartori
2022ISWCSolar Textiles for Off-grid Populations in Sub-Saharan Africa.Olaitan Adeleke, Heidi Woelfle, John Sartori, Lucy E. Dunne
2021ASPDACConstrained Conservative State Symbolic Co-analysis for Ultra-low-power Embedded Systems.Shashank Hegde, Subhash Sethumurugan, Hari Cherupalli, Henry Duwe, John Sartori
2021DACProperty-driven Automatic Generation of Reduced-ISA Hardware.Nathaniel Bleier, John Sartori, Rakesh Kumar
2021HPCADesigning a Cost-Effective Cache Replacement Policy using Machine Learning.Subhash Sethumurugan, Jieming Yin, John Sartori
2019ACSSCDImplementing First-order Optimization Methods: Algorithmic Considerations and Bespoke Microcontrollers.Xinwei Zhang, John Sartori, Mingyi Hong, Sairaj V. Dhople
2018DACEnhancing workload-dependent voltage scaling for energy-efficient ultra-low-power embedded systems.Veni Mohan, Akhilesh Iyer, John Sartori
2017ASPLOSDetermining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors.Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2017HPCAEnabling Effective Module-Oblivious Power Gating for Embedded Processors.Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2017ICCADScalable N-worst algorithms for dynamic timing and activity analysis.Hari Cherupalli, John Sartori
2017ISCABespoke Processors for Applications with Ultra-low Area and Power Constraints.Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2017MICROSoftware-based gate-level information flow security for IoT systems.Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2016ICCADAutomated error prediction for approximate sequential circuits.Amrut Kapare, Hari Cherupalli, John Sartori
2016ISCAExploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems.Hari Cherupalli, Rakesh Kumar, John Sartori
2015ICCADGraph-based Dynamic Analysis: Efficient Characterization of Dynamic Timing and Activity Distributions.Hari Cherupalli, John Sartori
2015ICPADSGPU-Accelerated Nick Local Image Thresholding Algorithm.M. Hassan Najafi, Anirudh Murali, David J. Lilja, John Sartori
2014CGOAutomated Algorithmic Error Resilience for Structured Grid Problems Based on Outlier Detection.Amoghavarsha Suresh, John Sartori
2014ISLPEDSoftware canaries: software-based path delay fault testing for variation-aware energy-efficient design.John Sartori, Rakesh Kumar
2013ICCDStatistical analysis and modeling for error composition in approximate computation circuits.Wei-Ting Jonas Chan, Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori
2013SCLow-power, low-storage-overhead chipkill correct via multi-line error correction.Xun Jian, Henry Duwe, John Sartori, Vilas Sridharan, Rakesh Kumar
2012DACCompiling for energy efficiency on timing speculative processors.John Sartori, Rakesh Kumar
2012DACOn software design for stochastic processors.Joseph Sloan, John Sartori, Rakesh Kumar
2012HPCAPower balanced pipelines.John Sartori, Ben Ahrens, Rakesh Kumar
2011CASESArchitecting processors to allow voltage/reliability tradeoffs.John Sartori, Rakesh Kumar
2011CASESStochastic computing: embracing errors in architectureand design of processors and applications.John Sartori, Joseph Sloan, Rakesh Kumar
2011DATEOn the efficacy of NBTI mitigation techniques.Tuck-Boon Chan, John Sartori, Puneet Gupta, Rakesh Kumar
2010ASPDACSlack redistribution for graceful degradation under voltage overscaling.Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori
2010DACRecovery-driven design: a power minimization methodology for error-tolerant processor modules.Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori
2010DATEScalable stochastic processors.Sriram Narayanan, John Sartori, Rakesh Kumar, Douglas L. Jones
2010HPCADesigning a processor from the ground up to allow voltage/reliability tradeoffs.Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori
2010ICCDOptimal power/performance pipelining for error resilient processors.Nicolas Zea, John Sartori, Ben Ahrens, Rakesh Kumar
2009DATEDistributed peak power management for many-core architectures.John Sartori, Rakesh Kumar
2009HiPCThree scalable approaches to improving many-core throughput for a given peak power budget.John Sartori, Rakesh Kumar