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Jonathan Peterson

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2025–2025

Best venue rank

B

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2025FPLFour-Input Lookup Table (LUT4) and Architectural Enhancements Enable Power Efficient Mid-Range FPGAs.Satwant Singh, Michael Schneider, Ziad Aboud, Jonathan Peterson, Senani Gunaratna, Ting Yew, Cindy Lee, Rick Crotty