Jonathan Saul
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
8
Venues
3
Active years
1991–1999
Best venue rank
C
Where they publish
Papers
8 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1999 | PDPTA | A High Speed Reconfigurable Firewall Based on Parameterization FPGA-Based Content Addressable Memories. | Alistair McEwan, Jonathan Saul, Andrew Bailey |
| 1998 | ICCD | Re-synthesis in technology mapping for heterogeneous FPGAs. | Maurice Kilavuka Inuani, Jonathan Saul |
| 1997 | FPL | Technology mapping of heterogeneous LUT-based FPGAs. | Maurice Kilavuka Inuani, Jonathan Saul |
| 1996 | FPL | Logic Synthesis for FPGAs Using A Mixed Exclusive-/Inclusive-OR Form. | Nigel Lester, Jonathan Saul |
| 1995 | ICCD | An enhanced algorithm for the minimization of exclusive-OR sum-of-products for incompletely specified functions. | Tomasz Kozlowski, Erik L. Dagless, Jonathan Saul |
| 1994 | ICCD | Architecture Oriented Logic Optimization for Lookup Table Based FPGAs. | Aiguo Lu, Jonathan Saul, Erik L. Dagless |
| 1992 | ICCD | State Assignment Algorithms for Parallel Controller Synthesis. | James Pardey, Tomasz Kozlowski, Jonathan Saul, Martin Bolton |
| 1991 | ICCD | An Algorithm for the Multi-Level Minimazation of Reed-Muller Rpresentations. | Jonathan Saul |