| 2026 | ICCSA | Matrix Functions Computation in Hardware Accelerators. | Daniel Oliveira, Juan A. Acebrn, Jos Monteiro |
| 2025 | WorldCIST | AI for Deception Detection: Techniques, Challenges, and Ethical Considerations. | Joo Neves, Jos Monteiro, Manuel Rodrigues |
| 2024 | KES | A Digital Twin-Based Digital Product Passport. | Jos Monteiro, Joo Barata, Sara Gentilini |
| 2022 | ICIS | Advancing the Smart Region Digital Twin: The Case of UNESCO GEOfood. | Jos Monteiro, Joo Barata |
| 2021 | EuroPar | Particle-In-Cell Simulation Using Asynchronous Tasking. | Nicolas L. Guidotti, Pedro Ceyrat, Joo Barreto, Jos Monteiro, Rodrigo Rodrigues, Ricardo Fonseca, Xavier Martorell, Antonio J. Pea |
| 2021 | KES | Artificial Intelligence in Extended Agri-Food Supply Chain: A Short Review Based on Bibliometric Analysis. | Jos Monteiro, Joo Barata |
| 2017 | DATE | Analysis of short-circuit conditions in logic circuits. | Joo Afonso, Jos Monteiro |
| 2015 | EUC | A Novel Method for the Approximation of Multiplierless Constant Matrix Vector Multiplication. | Levent Aksoy, Paulo F. Flores, Jos Monteiro |
| 2015 | ISCAS | Approximation of multiple constant multiplications using minimum look-up tables on FPGA. | Levent Aksoy, Paulo F. Flores, Jos Monteiro |
| 2014 | DATE | Optimization of design complexity in time-multiplexed constant multiplications. | Levent Aksoy, Paulo F. Flores, Jos Monteiro |
| 2014 | ICCD | Efficient design of FIR filters using hybrid multiple constant multiplications on FPGA. | Levent Aksoy, Paulo F. Flores, Jos Monteiro |
| 2014 | ISCAS | ECHO: A novel method for the multiplierless design of constant array vector multiplication. | Levent Aksoy, Paulo F. Flores, Jos Monteiro |
| 2014 | VMCAI | Weakest Precondition Synthesis for Compiler Optimizations. | Nuno P. Lopes, Jos Monteiro |
| 2012 | DATE | Design of low-complexity digital finite impulse response filters on FPGAs. | Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos Monteiro |
| 2012 | ICCAD | Multiple tunable constant multiplications: Algorithms and applications. | Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos Monteiro |
| 2011 | ISCAS | Optimization of area in digit-serial Multiple Constant Multiplications at gate-level. | Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, Jos Monteiro |
| 2011 | ISCAS | Hardware implementation of a centroid-based localization algorithm for mobile sensor networks. | Leonardo L. de Oliveira, Gustavo Fernando Dessbesell, Joo B. Martins, Jos Monteiro |
| 2010 | DATE | A new quaternary FPGA based on a voltage-mode multi-valued circuit. | Cristiano Lazzari, Paulo F. Flores, Jos Monteiro, Luigi Carro |
| 2010 | DSD | Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications. | Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos Monteiro |
| 2010 | ISCAS | Voltage-mode quaternary FPGAs: An evaluation of interconnections. | Cristiano Lazzari, Paulo F. Flores, Jos Monteiro, Luigi Carro |
| 2007 | DAC | Optimization of Area in Digital FIR Filters using Gate-Level Metrics. | Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, Jos Monteiro |
| 2006 | DAC | Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming. | Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, Jos Monteiro |
| 2005 | ICCAD | An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications. | Paulo F. Flores, Jos Monteiro, Eduardo A. C. da Costa |
| 2002 | ICCD | A New Architecture for Signed Radix-2m Pure Array Multipliers. | Eduardo A. C. da Costa, Sergio Bampi, Jos Monteiro |
| 2000 | ICCAD | Observability Analysis of Embedded Software for Coverage-Directed Validation. | Jos C. Costa, Srinivas Devadas, Jos Monteiro |
| 1999 | VLSID | CAD Techniques for Embedded System Design. | Srinivas Devadas, Sharad Malik, Jos Monteiro, Luciano Lavagno |
| 1999 | VLSID | Assignment and Reordering of Incompletely Specified Pattern Sequences Targetting Minimum Power Dissipation. | Paulo F. Flores, Jos C. Costa, Horcio C. Neto, Jos Monteiro, Joo Marques-Silva |
| 1996 | DAC | Scheduling Techniques to Enable Power Management. | Jos Monteiro, Srinivas Devadas, Pranav Ashar, Ashutosh Mauskar |
| 1995 | ISLPED | Techniques for the power estimation of sequential logic circuits under user-specified input sequences and programs. | Jos Monteiro, Srinivas Devadas |
| 1994 | DAC | A Methodology for Efficient Estimation of Switching Activity in Sequential Logic Circuits. | Jos Monteiro, Srinivas Devadas, Bill Lin |
| 1994 | ICCAD | Precomputation-based sequential logic optimization for low power. | Mazhar Alidina, Jos Monteiro, Srinivas Devadas, Abhijit Ghosh, Marios C. Papaefthymiou |
| 1994 | VLSID | Bitwise Encoding of Finite State Machines. | Jos Monteiro, James H. Kukula, Srinivas Devadas, Horcio C. Neto |
| 1993 | ICCAD | Retiming sequential circuits for low power. | Jos Monteiro, Srinivas Devadas, Abhijit Ghosh |