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Jrg Mische

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

8

Active years

2008–2018

Best venue rank

A*

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2018RTNSAnalysing Real-Time Behaviour of Collective Communication Patterns in MPI.Alexander Stegmeier, Martin Frieb, Jrg Mische, Theo Ungerer
2014RTNSGuaranteed Service Independent of the Task Placement in NoCs with Torus Topology.Jrg Mische, Theo Ungerer
2013DSDparMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability.Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jrg Mische, Joo Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Bddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cass, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiones, Milos Panic, Jaume Abella, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka
2012MICROLow power flitwise routing in an unidirectional torus with minimal buffering.Jrg Mische, Theo Ungerer
2010ISORCOptimisation of Energy Consumption of Soft Real-Time Applications by Workload Prediction.Florian Kluge, Sascha Uhrig, Jrg Mische, Benjamin Satzger, Theo Ungerer
2010ISORCRTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor.Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jrg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cass, Pascal Sainrat, Theo Ungerer
2010RTCSAUsing SMT to Hide Context Switch Times of Large Real-Time Tasksets.Jrg Mische, Sascha Uhrig, Florian Kluge, Theo Ungerer
2009SCOPESImplementing AUTOSAR scheduling and resource management on an embedded SMT processor.Florian Kluge, Chenglong Yu, Jrg Mische, Sascha Uhrig, Theo Ungerer
2008ATCAn Operating System Architecture for Organic Computing in Embedded Real-Time Systems.Florian Kluge, Jrg Mische, Sascha Uhrig, Theo Ungerer
2008ICCDExploiting spare resources of in-order SMT processors executing hard real-time threads.Jrg Mische, Sascha Uhrig, Florian Kluge, Theo Ungerer