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Jude A. Rivers

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

21

Venues

11

Active years

1996–2014

Best venue rank

A*

Where they publish

Papers

21 indexed papers, newest first.

YearVenueTitleAuthors
2014CASESSDCTune: A model for predicting the SDC proneness of an application for configurable protection.Qining Lu, Karthik Pattabiraman, Meeta Sharma Gupta, Jude A. Rivers
2012DATEPower management of multi-core chips: Challenges and pitfalls.Pradip Bose, Alper Buyuktosunoglu, John A. Darringer, Meeta Sharma Gupta, Michael B. Healy, Hans M. Jacobson, Indira Nair, Jude A. Rivers, Jeonghee Shin, Augusto Vega, Alan J. Weger
2011ICCDExploring the vulnerability of CMPs to soft errors with 3D stacked non-volatile memory.Guangyu Sun, Eren Kursun, Jude A. Rivers, Yuan Xie
2010MICROSAFER: Stuck-At-Fault Error Recovery for Memories.Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, Hsien-Hsin S. Lee
2009ISCAScalable high performance main memory system using phase-change memory technology.Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Jude A. Rivers
2009MICROTribeca: design for PVT variations with local recovery and fine-grained adaptation.Meeta Sharma Gupta, Jude A. Rivers, Pradip Bose, Gu-Yeon Wei, David M. Brooks
2008ISCAOnline Estimation of Architectural Vulnerability Factor for Soft Errors.Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers
2008ISPASSMetrics for Architecture-Level Lifetime Reliability Analysis.Pradeep Ramachandran, Sarita V. Adve, Pradip Bose, Jude A. Rivers
2007DSNArchitecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions.Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers
2007DSNA Framework for Architecture-Level Lifetime Reliability Modeling.Jeonghee Shin, Victor V. Zyuban, Zhigang Hu, Jude A. Rivers, Pradip Bose
2005DSNSoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors.Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers
2005ISCAExploiting Structural Duplication for Lifetime Reliability Enhancement.Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers
2004DSNThe Impact of Technology Scaling on Lifetime Reliability.Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers
2004ISCAThe Case for Lifetime Reliability-Aware Microprocessors.Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers
2003ISLPEDReducing instruction fetch energy with backwards branch control information and buffering.Jude A. Rivers, Sameh W. Asaad, John-David Wellman, Jaime H. Moreno
1998ICCDEvaluating the performance of active cache management schemes.Edward S. Tam, Jude A. Rivers, Vijayalakshmi Srinivasan, Gary S. Tyson, Edward S. Davidson
1998ICSUtilizing Reuse Information in Data Cache Management.Jude A. Rivers, Edward S. Tam, Gary S. Tyson, Edward S. Davidson, Matthew K. Farrens
1998MASCOTSmlcache: A Flexible Multi-Lateral Cache Simulator.Edward S. Tam, Jude A. Rivers, Gary S. Tyson, Edward S. Davidson
1997ICCDOn Effective Data Supply For Multi-Issue Processors.Jude A. Rivers, Edward S. Tam, Edward S. Davidson
1997MICROOn High-Bandwidth Data Cache Design for Multi-Issue Processors.Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin
1996ICPPReducing Conflicts in Direct-Mapped Caches with a Temporality-Based Design.Jude A. Rivers, Edward S. Davidson