Jui-I Tsai
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2006–2006
Best venue rank
B
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | SMC | Test Generation and Site of Fault for Combinational Circuits Using Logic Petri Nets. | Jui-I Tsai, Ching-Cheng Teng, Ching-Hung Lee |