Junfeng Chu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2011–2012
Best venue rank
B
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | FPL | Low area memory-free FPGA implementation of the AES algorithm. | Junfeng Chu, Mohammed Benaissa |
| 2011 | DSD | A Novel Architecture of Implementing Error Detecting AES Using PRNS. | Junfeng Chu, Mohammed Benaissa |