| 2015 | DAC | OSFA: a new paradigm of gate-sizing for power/performance optimizations under multiple operating conditions. | Subhendu Roy, Derong Liu, Junhyung Um, David Z. Pan |
| 2009 | DATE | In-network reorder buffer to improve overall NoC performance while resolving the in-order requirement problem. | Woo-Cheol Kwon, Sungjoo Yoo, Junhyung Um, Seh-Woong Jeong |
| 2006 | DATE | A systematic IP and bus subsystem modeling for platform-based system design. | Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-Taek Kim, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, Taewhan Kim |
| 2003 | ICCAD | Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design. | Junhyung Um, Taewhan Kim |
| 2003 | ISCAS | An efficient inverse multiplier/divider architecture for cryptography systems. | Junhyung Um, Sangwoo Lee, Youngsoo Park, Sungik Jun, Taewhan Kim |
| 2002 | DAC | Layout-aware synthesis of arithmetic circuits. | Junhyung Um, Taewhan Kim |
| 2002 | ICCAD | Layout-driven resource sharing in high-level synthesis. | Junhyung Um, Jae-Hoon Kim, Taewhan Kim |
| 2000 | ASPDAC | A timing-driven synthesis of arithmetic circuits using carry-save-adders (short paper). | Taewhan Kim, Junhyung Um |
| 2000 | DAC | A fine-grained arithmetic optimization technique for high-performance/low-power data path synthesis. | Junhyung Um, Taewhan Kim, C. L. Liu |
| 1999 | ICCAD | Optimal allocation of carry-save-adders in arithmetic optimization. | Junhyung Um, Taewhan Kim, C. L. Liu |