Skip to content

Jyh-Herng Wang

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

2

Venues

2

Active years

2005–2006

Best venue rank

B

Where they publish

Papers

2 indexed papers, newest first.

YearVenueTitleAuthors
2006ASPDACSimultaneous block and I/O buffer floorplanning for flip-chip design.Chih-Yang Peng, Wen-Chang Chao, Yao-Wen Chang, Jyh-Herng Wang
2005ICCADA routing algorithm for flip-chip design.Jia-Wei Fang, I-Jye Lin, Ping-Hung Yuh, Yao-Wen Chang, Jyh-Herng Wang