Simultaneous block and I/O buffer floorplanning for flip-chip design.
Chih-Yang Peng, Wen-Chang Chao, Yao-Wen Chang, Jyh-Herng Wang
Browse the full ASPDAC paper archive.
Chih-Yang Peng, Wen-Chang Chao, Yao-Wen Chang, Jyh-Herng Wang
Browse the full ASPDAC paper archive.