Jyun-Yi Wu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2007–2007
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | ISCAS | A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter. | Chi-Chang Lu, Jyun-Yi Wu, Tsung-Sum Lee |