| 2026 | ASPDAC | Novel Multi-Corner Delay Padding using Path Relationship Analysis and Dual Decomposition. | Kaixiang Zhu, Jiangnan Li, Lingli Wang, Wai-Shing Luk |
| 2026 | DATE | A Collaborative Framework for Multi-Level Multi-Objective Design Space Exploration. | Jiangnan Li, Kaixiang Zhu, Yuping Bai, Yunfei Dai, Qing He, Yu He, Lingli Wang |
| 2026 | ISCAS | An End-to-End Compilation Flow with Reinforcement Learning-Guided Logic Synthesis. | Jiangnan Li, Kaixiang Zhu, Qing He, Yu He, Lingli Wang |
| 2025 | ASPDAC | Yield-driven Clock Skew Scheduling Based on Generalized Extreme Value Distribution. | Kaixiang Zhu, Wai-Shing Luk, Lingli Wang |
| 2025 | FPL | GEF: A GNN-Based Evaluation Framework for FPGA Routing Architecture. | Yuanqi Wang, Yunfei Dai, Jiangnan Li, Kaixiang Zhu, Huizhen Kuang, Hao Zhou, Eric Ren, Xifan Tang, Weijun Qin, Tao Li, Lingli Wang |
| 2025 | ICCAD | DynVec: An End-to-End Framework for Efficient Vector-Dataflow Execution. | Jiangnan Li, Xianfeng Cao, Kaixiang Zhu, Wenbo Yin, Lingli Wang |
| 2021 | Broadnets | Developing an Online Examination Timetabling System Using Artificial Bee Colony Algorithm in Higher Education. | Kaixiang Zhu, Lily D. Li, Michael M. Li |