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Karel E. van Eerdewijk

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

1986–1986

Best venue rank

Multiconference

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
1986ICASSPOn the IC architecture and design of a 2 m CMOS 8 MIPS digital signal processor with parallel processing capability: The PCB5010/5011.Frans J. van Wijk, Frank P. Welten, Jef L. van Meerbergen, Jan Stoter, Jos A. Huisken, Antoine Delaruelle, Karel E. van Eerdewijk, Josef Schmid, Jan H. Wittek