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Kaviraj Chopra

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

14

Venues

4

Active years

2004–2008

Best venue rank

A*

Where they publish

Papers

14 indexed papers, newest first.

YearVenueTitleAuthors
2008DATETransistor-Specific Delay Modeling for SSTA.Brian Cline, Kaviraj Chopra, David T. Blaauw, Andres Torres, Savithri Sundareswaran
2008ICCADA statistical approach for full-chip gate-oxide reliability analysis.Kaviraj Chopra, Cheng Zhuo, David T. Blaauw, Dennis Sylvester
2007DACTop-k Aggressors Sets in Delay Noise Analysis.Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer
2007ICCADVictim alignment in crosstalk aware timing analysis.Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer, Joao Geada
2006DATEAn efficient static algorithm for computing the soft error rates of combinational circuits.Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
2006ICCADA new statistical max operation for propagating skewness in statistical timing analysis.Kaviraj Chopra, Bo Zhai, David T. Blaauw, Dennis Sylvester
2006ICCADAnalysis and modeling of CD variation for statistical static timing.Brian Cline, Kaviraj Chopra, David T. Blaauw, Yu Cao
2005DACCircuit optimization using statistical static timing analysis.Aseem Agarwal, Kaviraj Chopra, David T. Blaauw, Vladimir Zolotov
2005DACCAD tools for variation tolerance.David T. Blaauw, Kaviraj Chopra
2005DATEStatistical Timing Based Optimization using Gate Sizing.Aseem Agarwal, Kaviraj Chopra, David T. Blaauw
2005ICCADParametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation.Kaviraj Chopra, Saumil Shah, Ashish Srivastava, David T. Blaauw, Dennis Sylvester
2004DACImplicit pseudo boolean enumeration algorithms for input vector control.Kaviraj Chopra, Sarma B. K. Vrudhula
2004DATEA Framework for Battery-Aware Sensor Management.Sridhar Dasika, Sarma B. K. Vrudhula, Kaviraj Chopra, R. Srinivasan
2004VLSIDEfficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic.Kaviraj Chopra, Sarma B. K. Vrudhula, Sarvesh Bhardwaj