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Kazuya Tanigawa

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

2002–2008

Best venue rank

B

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2008FPLExploring compact design on high throughput coarse grained reconfigurable architectures.Kazuya Tanigawa, Tetsuya Zuyama, Takuro Uchida, Tetsuo Hironaka
2005ISCASDesign of superscalar processor with multi-bank register file.Tadashi Saito, Moto Maeda, Tetsuo Hironaka, Kazuya Tanigawa, Tetsuya Sueyoshi, Ken-ichi Aoyama, Tetsushi Koide, Hans Jrgen Mattausch
2002FPLA Generalized Execution Model for Programming on Reconfigurable Architectures and an Architecture Supporting the Model.Kazuya Tanigawa, Tetsuo Hironaka, Akira Kojima, Noriyoshi Yoshida